The present invention relates generally to the fabrication of semiconductor devices, and more particularly to the fabrication of magnetic random access memory (MRAM) devices.
A more recent development in semiconductor memory devices involves spin electronics, which combines semiconductor technology and magnetics. The spin of an electron, rather than the charge, is used to indicate the presence of a xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d. One such spin electronic device is an MRAM device, which includes conductive lines positioned in a different direction, e.g., pendicular to one another in different metal layers, the conductive lines sandwiching a magnetic stack or magnetic tunnel junction (MTJ), which functions as a magnetic memory cell. A current flowing through one of the conductive lines generates a magnetic field around the conductive line and orients the magnetic polarity into a certain direction along the wire or conductive line. A current flowing through the other conductive line induces the magnetic field and can partially turn the magnetic polarity, also. Digital information, represented as a xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d, is storable in the alignment of magnetic moments. The resistance of the magnetic memory cell depends on the moment""s alignment. The stored state is read from the magnetic memory cell by detecting the component""s resistive state.
An advantage of MRAMs compared to traditional semiconductor memory devices such as dynamic random access memory devices (DRAMs) is that MRAMs are non-volatile. For example, a personal computer (PC) utilizing MRAMs would not have a long xe2x80x9cboot-upxe2x80x9d time as with conventional PCs that utilize DRAMs. Also, an MRAM does not need to be powered up and has the capability of xe2x80x9crememberingxe2x80x9d the stored data. Therefore, MRAM devices are replacing flash memory, DRAM and static random access memory devices (SRAM) devices in electronic applications where a memory device is needed.
A magnetic stack comprises many different layers of metals and magnetic metals, and a thin layer of dielectric material having a total thickness of a few tens of nanometers. The magnetic stacks are typically built on top of copper wires embedded in an inter-level dielectric (ILD) material. The MTJ""s are positioned at intersections of underlying first conductive lines and overlying second conductive lines. MRAM devices are typically manufactured by forming a plurality of magnetic metal stacks arranged in an array, which comprise the magnetic memory cells. A memory cell array typically has conductive lines in a matrix structure having rows and columns.
One type of MRAM array uses a transistor to select each magnetic memory cell. Another type, a cross-point array, comprises an array of magnetic bits or magnetic stacks situated at the cross-points between two conductive lines. Information is stored in one of the magnetic layers of the magnetic stacks. To store the information, a magnetic field is necessary. In a crosspoint array, this magnetic field is provided by a wordline and bitline current which is passed through conductive lines. Information is stored in the magnetic memory cells by aligning the magnetization of one ferromagnetic layer (the information layer or free layer) either parallel or antiparallel to a second magnetic layer (the reference layer or fixed layer). The information is detectable due to the fact that the resistance of the element in the parallel case is different from the antiparallel case. Magnetic stacks or memory cells in a cross-point array are usually selected by passing sub-threshold currents through the conductive lines, e.g., in both the x- and y-direction, and where the conductive lines cross at the cross-points, the combined magnetic field is large enough to change the magnetic orientation.
A critical challenge in MRAM technology is the patterning of the MTJ stack material, and the conductive and insulating layers proximate the MTJ stack material, without damaging the MTJ stack material. In particular, it important to avoid damage to the upper conductive layers of the MTJ stack, to avoid damaging the memory device.
Plasma is an electrically charged or ionized gas that is often used for etching semiconductor materials. Plasma is also used to strip photoresist from over semiconductor material layers. The thin magnetic and conductive layers used in the MTJ stack are easily damaged during plasma etch processes and photoresist removal. Plasma has a negative charging effect on conductive materials, which can detrimentally impact device performance. Thus, what is needed in the art is a processing scheme for manufacturing a magnetic memory device that prevents exposure of the magnetic memory cell to plasma processes.
These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by preferred embodiments of the present invention, which provide a novel integration scheme for avoiding damage to MTJ material layers due to exposure to plasma processes. A buffer insulating layer and an etch stop material are deposited over the conductive hard mask of the MTJ stack after the MTJ stack is patterned. The buffer insulating layer protects the MTJ stack and conductive hard mask material during the patterning of subsequently formed conductive lines that make electrical contact to the conductive hard mask, and also during photoresist strip.
In accordance with a preferred embodiment of the present invention, a method of fabricating a magnetic memory device includes providing a workpiece having a plurality of first conductive lines formed thereon, a bottom electrode material being disposed over and abutting at least one first conductive line, a magnetic stack material being disposed over and abutting the bottom electrode material, a conductive hard mask being disposed over and abutting the magnetic stack material, and wherein the conductive hard mask and the magnetic stack material have been patterned with a pattern for at least one magnetic memory cell. The method includes depositing an insulating hard mask over the patterned conductive hard mask, patterned magnetic stack material, and exposed portions of the bottom electrode material, patterning the insulating hard mask with a pattern for a bottom electrode for the at least one magnetic memory cell, and patterning the bottom electrode material with the insulating hard mask. The insulating hard mask is removed from at least a top surface of the conductive hard mask, a buffer insulating layer is deposited over the insulating hard mask, and an etch stop material is deposited over the buffer insulating layer. A first insulating layer is deposited over the etch stop material, and the first insulating layer is patterned with a pattern for a plurality of second conductive lines, stopping on the etch stop material, the second conductive lines running in a different direction from the first conductive lines, wherein the pattern for at least one of the second conductive lines is disposed over and abuts the conductive hard mask. The etch stop material is removed from a top surface of at least the conductive hard mask, leaving at least a portion of the buffer insulating layer over the top surface of the conductive hard mask.
In accordance with another preferred embodiment of the present invention, a method of fabricating an MRAM device includes providing a workpiece, forming a plurality of first conductive lines over the workpiece, wherein a first insulating layer is disposed between adjacent first conductive lines, and depositing a bottom electrode material over and abutting at least one first conductive line. A magnetic stack material is deposited over and abutting the bottom electrode material, a conductive hard mask is deposited over the magnetic stack material, and the conductive hard mask is patterned with a pattern for at least one MRAM cell. The magnetic stack material is patterned with the conductive hard mask, an insulating hard mask is deposited over the patterned conductive hard mask, patterned magnetic stack material, and exposed portions of the bottom electrode material, and the conductive hard mask is patterned with a pattern for a bottom electrode for the at least one magnetic memory cell. The bottom electrode material is patterned with the insulating hard mask, the insulating hard mask is removed from at least a top surface of the conductive hard mask, and a buffer insulating layer is deposited over the insulating hard mask. An etch stop material is deposited over the buffer insulating layer, a second insulating layer is deposited over the etch stop material, and the second insulating layer is patterned with a pattern for a plurality of second conductive lines, stopping on the etch stop material, the second conductive lines running in a different direction from the first conductive lines, wherein the pattern for at least one of the second conductive lines is disposed over and abuts the conductive hard mask. The etch stop material is removed from a top surface of at least the conductive hard mask, leaving at least a portion of the buffer insulating layer over the top surface of the conductive hard mask.
In accordance with yet another preferred embodiment of the present invention, a magnetic memory device includes a workpiece, a plurality of first conductive lines disposed over the workpiece, and a first insulating layer disposed between adjacent first conductive lines. A bottom electrode is disposed over and abuts at least one first conductive line, a magnetic stack is disposed over and abutting the bottom electrode material, and a conductive hard mask is disposed over the magnetic stack material. An insulating hard mask is disposed over portions of the bottom electrode material, a buffer insulating layer is disposed over the insulating hard mask, and an etch stop material is disposed over the buffer insulating layer. A second insulating layer is disposed over the etch stop material, and a plurality of second conductive lines are formed within the insulating layer running in a different direction from the first conductive lines, wherein at least one of the second conductive lines is disposed over and abuts the conductive hard mask.
Advantages of preferred embodiments of the present invention include providing an integration scheme for a magnetic memory device, wherein the top surface of the conductive material over the MTJ stack is covered with a buffer insulating layer while the device is exposed to plasma processing, preventing damage to the MTJ stack. An etch stop material is deposited over the buffer insulating layer, which improves the uniformity of depth of second conductive lines formed over the magnetic memory cells.
The foregoing has outlined rather broadly the features and technical advantages of embodiments of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of embodiments of the invention will be described hereinafter, which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiments disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.